Read the help. The part of it that starts out saying, "Unused inputs and outputs are to be connected to terminal 8." Then read forward from there for the rest of the paragraph.
Here's what I believe is a working schematic:
Note the jumper I used to connect ground to the input. This is because I also tied pin 8 of the gates to ground. (Which is fine to do.)
However, as Fabio Barone carefully points out, ground may then have special significance.
To see that difference, let's remove the jumper above:
Note that the node is still 0 V, as before. But now it is directly connected to ground and the input is removed, causing the AND gate to have only one input, instead of two. So it's output is different.
But let's change things up. This time I won't ground pin 8. This will float pin 8 and it will get assigned a node name automatically by LTspice, instead of giving it the name "0":
Note that this is again working as it did with the jumper included in the first diagram, but without needing a jumper this time. That's because the pin 8 node name is no longer "0" and has been assigned an automatically generated name, which is matched up with any inputs or outputs also tied to that newly generated name.
This whole thing is undocumented. But I believe what's happening here is that pin 8 is special, as per the documentation. And the code does look to see what's tied to pin 8.
So if you then choose to also ground pin 8, then anything grounded at the inputs will "look just like pin 8." Which means directly tying an input pin to ground will then disable the input.
But if you instead lift pin 8 and leave it entirely floating, and it is not tied to ground, then ground isn't special anymore and can be directly used at an input, as work as expected.
I would suppose that this means if you tied pin 8 to some other node in the schematic, then any inputs tied to that same node would be disregarded and removed from consideration. When it is left floating, LTspice just assigns a node name to it and uses it as a special node name for that gate and may then be used to remove inputs (and outputs) that are tied to it.
So, time for an experiment:
Note here that I've tied all the unused inputs and outputs to the same net called NC. And this appears to work. So the gates can have their unused inputs tied globally and it still seems okay.
But... notice. I added a voltage supply on the left side there. Just laying there, unconnected for a moment. Let's connect it up to the NC net:
Interesting.
- The inverter seems to add the NC value to its input and put that as its output.
- However, the AND gates are putting out \$5\:\text{V}\$, instead. So they aren't adding. Instead, they seem to be outputting the NC voltage value when their output should be LO.
The inverter is curious. Let's see what happens if I replicate it and provide a LO and a HI input. What might its output be then?
Interesting. Both outputs are the same voltage, regardless of the two different inputs.
Now, what if I change NC to be \$-5\:\text{V}\$?
I don't even want to guess, yet. I think I need to do another step. What if I set the NC net to \$500\:\text{mV}\$, halfway between the default \$0\:\text{V}\$ and \$1\:\text{V}\$:
Curiouser and curiouser. At least the inverters at top are showing different values, again.
I'll leave things here for now. At some point, I will see if anyone has documented what is really going on. Possibly Mike has done so on some forum, years back. No idea.
(Thanks Fabio for the catch.)