Comment by periblepsis on does data and instruction memory we see in the data path corresponds to the L1 Instruction and Data cache inside of the core?

@PeterCordes Check out the R2000, which is what I used. Separate I and D cache. I also worked at Intel on the BX chipset. This would be circa year 1998-ish, around the PPro/P II period. I'm slightly comfortable with front side and back side buses and the internal layout of the ROB, registration stations, and the retire unit.