For a boolean function, after drawing K-map we got that function inthe form of the sum of products (minimal representation) but problemis that when we implement that minimal representation we use only"AND" and "OR" gates.
The old PAL/GAL devices were based on AND/OR logic grids, which directly maps SOP.
Is this gate implementation also minimal regarding the number of usedlogic gates?
No, not at all. For example, \$Z=A B+B C\$ would have the following k-map and implementation using SOP AND/OR logic:
But could just as well be implemented as POS OR/AND logic as \$Z=\left(A+C\right)B\$:
In other words, for a given minimal function in the sum of productsform can we further decrease the number of logic gates using NOR, XOR,etc. instead of ANDs and ORs.
The above shows that it can be reduced even without including NOR, XOR, etc.
But, in general, logic can often also be further reduced using additional options such as XOR, NOR, NAND, etc.